Method and apparatus for buffer storage of data packets which are to be transmitted via a connection that has been set up

ABSTRACT

So-called LCH packets are defined in the Hiperlan Type 2 System for wire-free transmission of video and audio data streams. These LCH packets have a length of 54 data bytes. Furthermore, the Hiperlan/2 Standard provides for so-called ARQ messages to be sent back to the transmitter in an SCH packet in a QOS mode (Quality Of Service), in which all the LCH data packets must be confirmed by the receiver. Space for the LCH and SCH data packets must be provided in a buffer store in the Hiperlan/2 interface for each connection that is set up. When there is a possibility of several hundred connections having been set up, separate reservation of memory areas for LCH and SCH packets would involve considerable complexity for the memory organization. The invention proposes that only one common area be reserved for LCH and SCH packets in the buffer store. The section which is provided for each LCH package is of such a size that it corresponds to a value 2 n  where nε[0, 1, 2, 3, . . . ], and this results in the hardware unit for the address calculation of these data section starts being greatly simplified. However, the area is chosen to be larger than actually required for the buffer storage of one LCH packet. The SCH packets, which likewise need to be buffer-stored, are entered in the unused part of such a section for an LCH packet. This considerably reduces the complexity for memory organization without having to leave a major proportion of the memory unused.

[0001] The invention relates to the technical field of memory managementfor buffer stores for data transmissions between appliances viaconnections that have been set up.

[0002] Prior Art

[0003] Recently, there has been major progress in the networking ofdomestic appliances, which may be, for example, entertainmentelectronics appliances or else other domestic appliances. In this case,not only systems in which the appliances are networked by means ofwires, that is to say with corresponding cable connections between theappliances, such as the IEEE1394 Bus System, are used, but, in addition,major efforts are being made to network appliances without the use ofwires. Various systems have, in the mean time, also been developed here.The so-called Hiperlan Type 2 System should be mentioned in particularat this point. The Hiperlan/2 System allows appliances to be networked,for example in a domestic environment. A number of channels with a widthof approximately 20 MHz are available in the 5 GHz band, and arethemselves subdivided using a TDMA method. The modulation methodcorresponds to an OFDM method, so that multipath reception causes aslittle interference as possible. The maximum data rate is in the regionof 54 Mbit/s. It is thus even possible to transmit video data streamsand other applications where there are large amounts of data using theHiperlan channels.

[0004] The Hiperlan/2 System is now intended to be developed into aderived ETSI Standard. A number of ETSI documents already exist in whichthe Hiperlan/2 System is specified. For example, the DLC Layer (DataLink Control) (which corresponds to the data switching layer in theISO/IEC seven-layer model) is described in the ETSI TS 101 761-x (xε[1,4]) documents. The overall system is then described in a number of ETSIdocuments, all of which, however, can be obtained from the EuropeanTelecommunication Standard Institute at F-06921 Sophia AntipolisCedex/France.

[0005] The Hiperlan/2 System makes it possible to set up a large numberof connections in parallel. The Hiperlan/2 System isconnection-oriented. There are two types of connection, namelypoint-to-point connections and point-to-multipoint connections. Apoint-to-point connection is bidirectional, while a point-to-multipointconnection is unidirectional, in the direction of the portable or mobileterminal. The corresponding Hiperlan interface therefore has to be ableto distinguish between and to set up a large number of connections. Thesystem is designed such that even up to several hundred connections canbe set up in parallel.

[0006] It is then also necessary to distinguish between various types oflogical channels which may be associated with one connection. The LCHand SCH channels (which correspond to long transport channel and shorttransport channel) are particularly important in this context. The LCHchannel represents a channel with a relatively large transmissioncapacity, via which even isochronous data such as video data streams andaudio data streams can be transmitted. The SCH channel has a smallertransport capacity, and is therefore used for transmitting asynchronousdata, such as control information and acknowledgement messages inaccordance with the transmission protocol.

[0007] At least one LCH channel and one SCH channel may be associatedwith one connection. This complicates the memory organization for thebuffer memory in which all the data packets which are intended to betransmitted via the air interface or have been received via the airinterface and are intended to be passed on to an application. By way ofexample, and specifically, one ad hoc solution envisages a memory areabeing reserved for the LCH channel and a second memory area beingreserved for the SCH channel for each connection that is set up. Sincethese memory areas for an LCH channel or for an SCH channel are set upas ring buffers, it is therefore necessary to store a start address andan end address for each channel, and to set up at least one writepointer and one read pointer for each channel, in order that the datacan be written and read using mutually independent processes. If severalhundred connections have been set up, this memory organizationcomplexity is considerable.

[0008] The data packets which transmit the data in an LCH channel have,in accordance with the specification, a size of 54 bytes, comprising 48payload data bytes, three or two data bytes of additional information(header information) plus three or four bytes for an error recognition(CRC) or error correction code (FEC), if used. The CRC code need notnecessarily be buffer-stored, since the CRC code can also be calculatedand decoded “on-the-fly”, which makes buffer storage of this codeunnecessary. The data sections for one LCH channel would therefore haveto have a size of 51 or 54 bytes. The complexity for calculating theaddresses of the starts of these data blocks is therefore increased,since these are data blocks with a size, for example, of 2⁶=64 bytes,rather than being data blocks with a size of 2^(n) bytes.

[0009] Invention

[0010] The aim of the invention is to simplify the memory organizationfor the buffer store for the air interface. According to the invention,this is achieved in that the data block size for the LCH packets isfirst of all enlarged to a value of 2⁶=64 bytes, and the part of a datablock which remains free is used for storage of data from the SCHpackets. This is because the SCH packets require a memory space of 7bytes for buffer storage and, to this extent, can be stored togetherwith the LCH packets, whose maximum size is 54 bytes, in one 64-byteblock. The remaining three bytes may be used for further additionalinformation.

[0011] The invention has the advantage that, firstly, the addresscalculation unit for the data blocks where the LCH packets are intendedto be stored is greatly simplified. Secondly, however, the inventionalso has the advantage that LCH packets and SCH packets for oneconnection can be stored jointly in a common memory section, so that, inaddition, fewer address pointers need to be set up for the start and endof each memory area. Furthermore, the invention also has the advantagethat, for LCH packets with a size of 54 bytes and SCH packets with asize of 7 bytes, only 4.6% of the memory would remain unoccupied,assuming that one SCH packet is stored for each LCH packet.

[0012] The dependent claims allow further advantageous measures andimprovements of the method and the apparatus according to the invention.

[0013] Since the buffer-stored data packets are in any case intended tobe emitted as quickly as possible to the application or to a furtherinterface, or via an antenna, it is advantageous to set up a reservedsection as a ring buffer in the buffer store for each connection that isset up. This means that, once the reserved section in the buffer storehas been filled, the next data packets are once again written at thestart of the section, with the data that has previously beenbuffer-stored there then being overwritten, although this has nodisadvantageous effect, since data such as this will have been passed onwell before this time.

[0014] The measure according to claim 5 and claim 12 is also highlyadvantageous, on the basis of which at least one byte is additionallystored during the buffer storage of a data packet, containing statusinformation relating to that data packet, namely and in particular as towhether the data packet has already been completely written, that is tosay whether or not it is ready to be passed on. This measure makes thewriting and reading processes highly flexible, and there is no need toalways completely write a complete LCH or SCH data packet. The writingand reading processes can be interrupted a number of times without thisleading to conflicts relating to memory access. In addition, it is alsoadvantageous to provide an associated write and read pointer for therespective LCH and SCH packets. A note should then be made in each ofthese as to the points at which the writing or reading process of a datapacket has been interrupted, so that the process can be continuedseamlessly from the correct point when the next write or read accesstakes place.

[0015] Since, according to the Hiperlan/2 System, one channel paircomprising an LCH channel and an SCH channel is always set up for eachconnection, it is questionable whether a correspondingly large number ofSCH data packets will ever occur when, for example, a video data streamis being transported via the LCH channel. This is the case in thetransmission mode, in which the LCH data packets are protected by CRCerror recognition code. This is because data packets such as these are“positively” or “negatively” acknowledged by means of so-called ARQmessages (Automatic Repeat Request). A positive acknowledgement in thiscase means that correct reception of an LCH data packet is signalled tothe transmitter. A negative acknowledgement then means that thetransmitter receives an acknowledgement message only when an LCH packethas been transmitted with one or more errors. However, even in thenegative acknowledgement mode, SCH packets frequently have to be sentback, and these must likewise be buffer-stored in the buffer store.

[0016] The greater the amount of data to be transmitted via oneconnection, the larger the associated area must be in the buffer store.However, in this case, it is also necessary to transmit more LCH packetsand, at the same time, also to transmit back more ARQ messages, thusutilizing the data sections, which have been enlarged to 2^(n) dataunits (bytes), for the LCH packets.

DRAWINGS

[0017] Exemplary embodiments of the invention will be explained in moredetail in the following description and are illustrated in the drawings,in which:

[0018]FIG. 1 shows the application for transmission for video and audiodata originating from a DV camcorder to a DVHS video recorder;

[0019]FIG. 2 shows a rough block diagram of a personal computer forpostprocessing of the video and audio data originating from thecamcorder, and a rough block diagram of the DVHS video recorder;

[0020]FIG. 3 shows the layout of an LCH data packet with a CRC errorrecognition code;

[0021]FIG. 4 shows the layout of an LCH data packet with an FEC errorcorrection code;

[0022]FIG. 5 shows the layout of an SCH data packet;

[0023]FIG. 6 shows the arrangement of the LCH data packet with an errorcorrection code CRC in the reserved area of the buffer store, for bufferstorage;

[0024]FIG. 7 shows the arrangement of an LCH data packet with an FECerror correction code in the reserved area of a buffer store, for bufferstorage;

[0025]FIG. 8 shows the interleaving of an SCH data packet in thereserved block for an LCH packet with an error recognition code CRC; and

[0026]FIG. 9 shows the concept of the ring buffer for each memory areain the buffer store, which is reserved for one connection withcorresponding LCH and SCH write and read pointers.

DETAILED DESCRIPTION OF THE INVENTION

[0027] The invention will be explained using the example of theimplementation of a buffer store for a Hiperlan/2 interface.

[0028]FIG. 1 shows one example of an application. The reference number10 denotes a camcorder, for example a mini DV camcorder. This isconnected via an IEEE1394 connection to a personal computer 11. Thepersonal computer 11 is used to carry out the postprocessing of arecorded video. To do this, it must be programmed with suitablesoftware. The complete video is then first of all stored on a hard disk.Based on the illustrated application, this complete video is, however,passed on without the use of wires, for archiving purposes, to a DVHSvideo recorder 12. This need not necessarily be located in the same roomas the personal computer 11. The wire-free transmission of the video andaudio data from the postprocessed video film is intended to be carriedout using the Hiperlan/2 System. To do this, of course, both thepersonal computer 11 and the DVHS video recorder 12 must be equippedwith an appropriate Hiperlan interface. FIG. 2 shows the rough layout ofthe personal computer and of the DVHS video recorder in more detail.

[0029] The layout of the personal computer 11 will be explained first ofall. Only those components of the personal computer which are essentialfor postprocessing will be explained. These relate to an IEEE1394interface 110, a CPU 120, a hard disk 130 and a Hiperlan interface 140.The video and audio data from the camcorder 10 are passed via theIEEE1394 bus and the interface 110 to the personal computer 11. Theprogram which is used for postprocessing of the video/audio data isprocessed by the CPU 120. The completely processed video/audio data isinitially stored on the hard disk 130.

[0030] The complete video film is then transmitted, under user control,to the DVHS video recorder 12 for archiving on a DVHS video tape. Thisis intended to be done in accordance with the Hiperlan/2 Standard, asmentioned. The rough layout of the interface 140 is likewise illustratedin FIG. 2. The reference number 141 denotes an error correction codecalculation unit. The reference number 142 denotes a microcontroller,which coordinates a large number of processes in the interface 140 inorder to implement the Hiperlan/2 protocol. The figure likewiseillustrates the buffer store 143, in which all the data packets to betransmitted via the air interface are buffer-stored. The buffer store143 is used for both transmission directions. As shown in FIG. 2, atransmitting antenna is fitted to the personal computer 11. However,this antenna also at the same time acts as a receiving antenna, whendata is being transmitted from some other appliance to the personalcomputer without using wires.

[0031] The layout of the DVHS video recorder 12 is illustrated in highlysimplified form, and it likewise contains a Hiperlan/2 interface 140.Furthermore, the reference number 150 denotes a magnetic tape cassette,on which the received data is finally recorded. The data may be recordedusing the DV data format, in which case no reformatting is required,since the data source 10 has likewise recorded the data using thisformat. The components 141-143 of the Hiperlan/2 interface 140 are onceagain emphasized, as has already been mentioned above.

[0032] Instead of the DVHS video recorder it is also, of course,possible to use any other recorder, for example a DVD recorder.

[0033] As has already been explained in the introduction, the Hiperlan/2System is an accepted ETSI Standard, which is technically specified in anumber of documents. For disclosure purposes relating to this invention,reference is therefore expressly made to this ETSI Standard. In thiscase, reference is made in particular to the document ETSI TS 101 761-xwith xε[1, 2, 3, 4] “Broadband Radio Access Radio Networks (BRAM);Hiperlan Type 2; Data Link Control (DLC); Part 1 to Part 4. In addition,reference is also made to the international patent application fromTelefonaktiebolaget LM Ericsson with the publication number WO 00/60796,in which the MAC protocol (Medium Access Control) for the Hiperlan/2Systems is explained in more detail.

[0034] Based on this protocol, so-called LCH (Long Transport Channel)data packets are used for transporting video/audio data streams via theair interface. In accordance with the Hiperlan/2 specification, the datacan be transmitted in various QOS modes (Quality of Service). The datapackets may be transmitted with positive/negative acknowledgement, theymay be sent without acknowledgement, and they may even be sentrepeatedly for reliability, security or safety reasons.

[0035] Different formats for the LCH data packets are provided for thetwo first-mentioned QOS modes.

[0036]FIG. 3 shows the format of an LCH data packet which is used forthe QOS mode with acknowledgement. The LCH packet comprises 54 bytes, ofwhich 48 bytes relate to payload data bytes, three bytes relate toadditional information (header information) and the last three bytesrelate to the error recognition code CRC 24. The additional informationin the first three bytes of the data packet relate to the details aboutthe PDU type (Protocol Data Unit), as listed, by way of example, inSection 6.1.4 of the document ETSI TS 101 761-1 V1.2.1 (2000-11).Furthermore, the sequence number is also stored as additionalinformation, comprising 10 bits, in the first two bytes of the datapacket, effectively acting as a serial number for the LCH data packets.The structure of the data packet as shown in FIG. 3 is illustrated, forexample, in FIG. 25, in Section 6.2.8, of the abovementioned ETSIdocument. One difference between FIG. 3 and FIG. 25 in the ETSI documentis that, in FIG. 3, 1.5 bytes are also reserved for additionalinformation in the second and third bytes of the data packet. This isnot yet shown in FIG. 25. However, if all the specification requirementsare taken into account, it necessarily follows from this that thisadditional information is also additionally required. Furthermore, noservice is yet provided in which more than 48 payload data bytes need tobe transmitted in each LCH data packet. The reserved CL tag bits arereserved for future use, but so far have no further significance fortransmission. Only, the SAR bit (Segmentation Reassembly End Flag) isrequired, and marks the last of the received LCH data packets within aPDU data train (group of LCH packets, PDU train).

[0037] The structure of the LCH data packet for the unacknowledgedtransmission mode is shown in FIG. 4. In this case, the last four bytesrelate to a forward error correction code FEC, which may likewise becalculated as a Read Solomon code. In this case as well, there are onceagain 48 payload data bytes in the packet. However, only two bytes needto be reserved for the additional information. In this unacknowledgedoperating mode, there is no need to transmit a sequence number. Thissituation is described in FIG. 7, in Section 5.8.4.2, of the ETSIdocument ETSI TS 101 761-4 V1.2.1 (2000/12). The parts of the additionalinformation on a grey background are therefore stressed once again inFIG. 4, since they are not evident from FIG. 7 of that document butresult from further requirements in the ETSI Standard. The layout of SCHdata packets as required for the acknowledged QOS mode is shown in FIG.5. The last two bytes of an SCH packet relate to a CRC error recognitioncode. The second nibble in the first byte once again relates to thedetails of the PDU type. An SCH packet such as this allows five fullpayload data bytes to be transmitted. In the application underconsideration here, an ARQ message is in each case transmitted back tothe transmitter for acknowledgement, in an SCH packet such as this.

[0038] The layout of the SCH packet illustrated in FIG. 5 is alsoevident from FIG. 12, in Section 6.1.5, of the ETSI document ETSI TS 101761-1 V1.2.1 (2000-11). The layout of ARQ messages is explained inSection 6.2.9.2 of the same ETSI document for the various applicationsof positive acknowledgement, negative acknowledgement and repetitionmode, and therefore does not need to be explained in any more detailhere.

[0039]FIG. 6 illustrates how an LCH data packet as shown in FIG. 3 mustbe written to the buffer store for buffer storage. The buffer store isadvantageously organized for memory words of four bytes, that is to sayin quadlet units. However, special hardware ensures that, when anaddress in the buffer store is accessed, only a single byte of a quadletcan be read or written, as well. This is indicated by the two digitsafter the decimal point in the address details in FIG. 6. The firstquadlet is used to buffer-store not only the three bytes for theadditional information in the LCH packet, but an additional byte is alsoreserved in fourth place, in which status information for the LCH packetcan be stored. Each processing step thus results in signalling as towhether the packet has or has not already been completely written. Thismakes it possible to write such a data packet in the form of successivememory words. The two last quadlets, which are on grey backgrounds, areadmittedly still illustrated in FIG. 6, but are identified as beingunused. This is due to the fact that, in order to simplify the addresscalculation for the buffer storage of LCH packets, the inventionprovides for the corresponding memory area in the buffer memory to besubdivided into sections whose size is 64 bytes, that is to say intosections of 16 quadlets. This greatly simplifies the address calculationunit. This is because it can easily determine the start of the nextsection by incrementation of the most significant part of the address,ignoring the six least significant address bits. It should also bementioned that the CRC 24 checkword need not be entered in the bufferstore, and is therefore also on a grey background, since the CRCcalculation can be carried out by means of suitable hardware in realtime during the transmission and during the decoding of received data.The resultant free space in the respective 64 byte block can be used forstorage of the SCH packets which have to be sent back to the transmitterin the acknowledged QOS mode.

[0040] This situation is different to that for the LCH packets shown inFIG. 4. FIG. 7 shows the format in which these are stored in the bufferstore. Owing to the lack of a sequence number, two bytes are in thiscase reserved for status information in the first quadlet. This thenaligns the subsequent payload data bytes such that they are immediatelyadjacent in the buffer store, which is organized on the basis ofquadlets. The 48 payload data bytes thus follow in the next 12 quadlets.The fourteenth quadlet is still used by the FEC error correction code.This is because this need not be calculated in real time during thetransmission or the reception of a data packet, and must thereforelikewise be buffer-stored. The remaining two quadlets are once againstill unused, however. They may admittedly be used for buffer storage ofSCH packets but, since LCH packets with FEC code such as these are usedonly for the unacknowledged QOS mode, that is to say no acknowledgementmessages are produced, which occur regularly and could use up asignificant amount of memory. However, it is possible to store SCHpackets from other connections in this memory area.

[0041]FIG. 8 also shows an interleaved SCH packet in the memory block,whose size is 64 bytes, for an LCH packet. The fourteenth quadlet, whichremains unused and is arranged between the LCH and SCH packets, is shownon a grey background. This quadlet may be used for storing additionalinformation.

[0042] Finally, FIG. 9 also shows the complete memory area which isreserved in the buffer memory for one connection. The start of thismemory area is marked by the word start. The end of the reserved area ismarked in a corresponding way with the word end. Corresponding pointersare also applied in the interface, thus defining where the reserved areafor the associated connection is located in the memory. Furthermore, thesection of the buffer store that is illustrated is organized as a ringbuffer. This means that the memory area is first of all filled with LCHand SCH packets from the start of the memory area. The memory is thenfilled ever further in the downward direction, until the end of thereserved memory area is reached. If any more data arrives for bufferstorage, then this must be entered once again at the start of thereserved memory area. When setting up the connection, the memorymanagement has to estimate the size of the memory area which must bereserved for the service to be transmitted, in order to avoid read/writeconflicts. This is defined on the basis of the required data rate. Thecorresponding process is likewise described in the specification of theHiperlan/2 Standard.

[0043]FIG. 9 also in each case shows the write and read pointers for theLCH and SCH packets. The LCHR pointer corresponds to the read pointerfor LCH packets. The LCHW pointer corresponds to the write pointer forLCH packets. FIG. 9 shows that the LCHW pointer points to an entryfurther down in the reserved memory area, while the LCHR pointer is setto a point further up in the memory area. The area above the LCHRpointer can once again be overwritten by LCH packets. Correspondingpointers are also provided for the SCH packets. The SCHR pointer onceagain relates to the read pointer, and the SCHW pointer relates to thewrite pointer for the SCH packets.

[0044] The invention can be used in particular for the Hiperlan/2System. However, it is not restricted exclusively to this system. Infact, it can be used wherever a pair of data packets must bebuffer-stored for connections that have been set up, in which one of thedata packets can in each case be used to fill memory areas which are notused by the other data packet, if the data packet size of the first datapacket differs from a value of 2^(n) data units.

1. Method for buffer storage of data packets of a first type and of asecond type which are to be transmitted via a connection that has beenset up, with the data packets of the first type having a defined firstlength which does not correspond to a number 2^(n), nε[0, 1, 2, 3, . . .] of data units, and having a buffer store for the data packets, whereinthe buffer store is subdivided into sections whose size is 2^(n) dataunits, where 2^(n) is greater than the defined first length of the datapackets of the first type, and that part of the buffer store which isnot occupied per data section is filled with the data from the datapackets of the second type.
 2. Method according to claim 1, in which onearea of the buffer store is reserved for a connection that has been setup, and this area is organized as a ring buffer in the buffer memory. 3.Method according to claim 1, in which the data unit relates to a binarynumber with a length of 8 bits, that is to say it corresponds to onebyte.
 4. Method according to claim 1, in which the buffer store isorganized in memory words, whose length corresponds to an even multipleof, in particular to four times, the length of a data unit.
 5. Methodaccording to claim 1, in which, during the buffer storage of a datapacket, at least one byte is additionally stored which contains statusinformation relating to the data packet, in particular as to whether thedata packet has already been completely written, that is to say whetheror not it is ready to be passed on.
 6. Method according to claim 1, inwhich the connection that has been set up is a connection based on theHiperlan Type 2 Standard and a data packet of the first type is an LCHpacket based on the Hiperlan Type 2 Standard, and a data packet of thesecond type is an SCH packet based on the Hiperlan Type 2 Standard. 7.Method according to claim 6, in which a completely written,buffer-stored LCH data packet contains 48 payload data bytes and, withadditional information, has a size of 52 bytes or 56 bytes, and thebuffer store is subdivided into sections whose size is 64 bytes, withthe remaining 12 or 8 bytes being used for buffer storage of an SCHpacket.
 8. Method according to claim 6, in which an ARQ message based onthe Hiperlan/2 Standard is stored in the SCH packet.
 9. Apparatus forbuffer storage of data packets of a first and of a second type which areto be transmitted via a connection that has been set up, in which thedata packets of the first type have a defined first length which doesnot correspond to a number 2^(n), nε[0, 1, 2, 3, . . . ] of data units,having a buffer store for the data packets, wherein the buffer store issubdivided into sections whose size is 2^(n) data units, where 2^(n) isgreater than the defined length of the data packets of the first type(LGH), and in that that part of the buffer store which is not occupiedper data section is used for buffer-storing the data packets of thesecond type.
 10. Apparatus according to claim 9, in which the data unitrelates to a binary number with a length of 8 bits, that is to say itcorresponds to one data byte.
 11. Apparatus according to claim 9, inwhich the buffer store is organized in memory words, whose lengthcorresponds to an even multiple of, in particular to four times, thelength of a data unit.
 12. Apparatus according to claim 9, havingevaluation means for the status information, which is stored in at leastone additional byte, for the buffer-stored data packet, in particular asto whether the data packet has already been completely written, that isto say whether or not it is ready to be passed on.
 13. Apparatusaccording to claim 9, in which a data area is reserved in the bufferstore for the data packets which are to be transmitted via a connectionthat has been set up, with start and end information being stored forthe reserved data area for a connection, and with a write pointer and aread pointer being provided for the data of the data packets of thefirst and the second type.